(Reuters) – Silicon Valley’s Wave Computing said on Tuesday it is launching designs for two new microprocessors this year using RISC-V architecture as it sunsets its once-popular MIPS architecture.
The move adds to growing momentum for RISC-V, an open-standard instruction set architecture (ISA) and emerging rival to proprietary architecture from Britain’s Arm, the semiconductor technology firm owned by SoftBank Group Corp.
RISC-V’s nascent but growing popularity owes much to its free and open-standard nature. It is also in focus due to its potential to help China build up its own semiconductor industry as Chinese companies developing technology based on the architecture could be shielded from U.S. export controls.
Wave’s MIPS architecture, developed in the lab of Stanford University professor John Hennessy, the current chairman of Alphabet Inc, is now over 35 years old.
It has fallen behind Arm’s architecture, which rules in the mobile chip world, and x86 – initially developed by Intel Corp – which dominated laptop and data center chips. After being owned by a string of companies, MIPS was bought by Wave which ended up in bankruptcy in 2020 and emerged from it early last year.
“In order for the company to continue to exist, it needed to find another way to be able to fight this ecosystem battle that it lost,” Desi Banatao, who took over as CEO of Wave after its bankruptcy, told Reuters in an interview.
He added that the company has already inked a contract to supply one of the new processor designs to an automotive tech firm.
Sanjai Kohli, Wave’s former CEO, said the MIPS and RISC-V instruction sets are close enough that the company was able to easily modify many of the MIPS processors it owns.
Intel has backed RISC-V, investing in the ecosystem as part of the launch of a $1 billion fund to support companies with disruptive technologies as it builds up its foundry business.
RISC-V also gained more attention after Nvidia Corp’s bid to buy Arm heightened concern about the potential for the chipmaker to control Arm’s architecture. The bid has since failed after being rejected by regulators.
(Reporting by Jane Lanhee Lee; Editing by Cynthia Osterman and Edwina Gibbs)
